https://schmole.com/ Deep dives into computer hardware design, microarchitecture, silicon implementation, performance engineering, and the tools that support them. 2026-05-08T18:07:16-07:00 F. Schmole https://schmole.com/ Jekyll © 2026 F. Schmole /assets/img/favicons/favicon.ico /assets/img/favicons/favicon-96x96.png 2026-05-08T13:00:00-07:00 2026-05-08T13:00:00-07:00 https://schmole.com/2026/05/08/bare-bones-gpt2-inference/ F. Schmole

I built a from-scratch GPT-2 inference engine for educational purposes — no frameworks, no shortcuts. Rust handles the tensor math (via PyO3), Python handles everything else: tokenizer, transformer, generation, and CLI. The full source is at github.com/fschmole/bare-bones-inference. Why Most tutorials either hand-wave the internals or drown you in framework abstractions. I wanted to unders...

2026-02-22T18:00:00-08:00 2026-02-22T18:00:00-08:00 https://schmole.com/2026/02/22/tlaplus-sequence-diagrams/ F. Schmole

In a previous post I argued that machine-readable specifications are the foundation for AI-augmented hardware design. This post digs into a specific tool for that job: TLA+ and its procedural front-end PlusCal. What TLA+ Brings to Hardware Architecture TLA+ (Temporal Logic of Actions) is a formal specification language for describing concurrent and distributed systems. PlusCal is a pseudoco...

2026-02-16T14:00:00-08:00 2026-02-16T14:00:00-08:00 https://schmole.com/2026/02/16/machine-readable-specs-single-source-of-truth/ F. Schmole

Every hardware team has lived this: a 400-page PDF spec says one thing, the RTL says another, and the testbench assumes a third. The bug that falls out is nobody’s fault and everybody’s problem. Now multiply that failure mode by an LLM that has no judgment about which source to trust — and “making something up” becomes the default behavior whenever the input is ambiguous. If we are serious a...

2026-02-09T10:00:00-08:00 2026-02-09T10:00:00-08:00 https://schmole.com/2026/02/09/data-driven-fabric-architecture/ F. Schmole

Architectural decisions for a high-performance I/O-memory fabric should be grounded in data, not gut feel. It sounds obvious, but in practice the pressure to “just pick something reasonable” is real — timelines are tight, the design space is enormous, and canonical answers are rarely published. The antidote is to look at the traffic before committing silicon resources to serve it. Why Data Be...

2026-02-02T09:00:00-08:00 2026-02-02T09:00:00-08:00 https://schmole.com/2026/02/02/welcome/ F. Schmole

Welcome to schmole.com — a space for engineering notes, deep dives, and tools from my work in silicon hardware architecture. Posts here will cover fabric architecture trade-offs, formal specification workflows, data-driven trace analysis, and the Python and browser-based utilities I build to make hardware design faster and more rigorous.